Marc de Kruijf

This work introduces a new processor architecture, the idempotent processor architecture, that allows speculative execution without the need for hardware checkpoints to recover from mis-speculation. Idempotent processors execute programs as a sequence of compiler-constructed idempotent (re-executable) regions, and the nature of these regions allows state to be reproduced by re-execution, obviating the need for hardware recovery support. The work builds upon the insight that programs naturally decompose into a series of idempotent regions and that these regions can be large.

The talk will cover how idempotent processor architecture simplifies the design of in-order processors. Idempotent processor architecture eliminates much of the complexities in modern in-order processors by allowing instructions to retire out of order with support for re-execution when necessary to recover precise state. Our quantitative results show that we obtain a geometric mean performance increase of 4.4% (up to 25% and beyond) while maintaining an overall reduction in power and hardware complexity.

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Gagan Gupta: Dataflow Execution of Sequential Imperative Programs on Multicore Architectures

As multicore processors become the default, researchers are aggressively
looking for program execution models that make it easier to use the
available resources. Multithreaded programming models that rely on
statically-parallel programs have gained prevalence. Most of the existing
research is directed at adapting and enhancing such models, alleviating
their drawbacks, and simplifying their usage. This paper takes a different
approach and proposes a novel execution model to achieve parallel
execution of statically-sequential programs. It dynamically parallelizes
the execution of suitably-written sequential programs, in a dataflow
fashion, on multiple processing cores. Significantly, the execution is
race-free and determinate. Thus the model eases program development and
yet exploits available parallelism.
This presentation describes the implementation of a software runtime
library that implements the proposed execution model on existing
commercial multicore machines. We present results from experiments running
benchmark programs, using both the proposed technique as well as
traditional parallel programming, on three different systems. We find that
in addition to easing the development of the benchmarks, the approach is
resource-efficient and achieves performance similar to the traditional
approach, using stock compilers, operating systems and hardware, despite
the overheads of an all-software implementation of the model.