%Z -------------------------------------------------------------------------
%Z	Refer/bib bibliographic entries for the 10th
%Z	INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE
%Z	1983 created by Julie Fingerson and Mark D. Hill
%Z 
%Z	These entries are correct to the best of our knowledge,
%Z	but we accept no responsibility for the consequences of
%Z	any errors.  Email corrections to hoffman@cs.wisc.edu.
%Z	Last change:  Thu Mar 30 14:32:06 CST 1995
%Z
%Z -------------------------------------------------------------------------
%Z

%T Size, Power, and Speed
%A Maurice V. Wilkes
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 2-4

%T Towards a Taxonomy of Computer Architecture Based on the Machine Data Type View
%A W. K. Giloi
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 6-15

%T Frameworks for a Taxonomy of Fault-Tolerance Attributes in Computer Systems
%A Algirdas Avizienis
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 16-21

%T Caddie - An Interactive Design Environment
%A Bjorn Pehrson
%A Joachim Parrow
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 24-31

%T On the Verification of Computer Architectures Using an Architecture Description Language
%A Subrata Dasgupta
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 32-38

%T Research on Synthesis of Concurrent Computing Systems
%A Richard M. King
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 39-46

%T Architecture of the PSC: A Programmable Systolic Chip
%A Allan L. Fisher
%A H. T. Kung
%A Louis M. Monier
%A Yasunori Dohi
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 48-53

%T Synchronizing Large VLSI Processor Arrays
%A Allan L. Fisher
%A H. T. Kung
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 54-58

%T The Boolean Vector Machine [BVM]
%A Robert A. Wagner
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 59-66

%T A VLSI Tree Machine for Relational Data Bases
%A M. A. Bonuccelli
%A E. Lodi
%A F. Luccio
%A P. Maestrini
%A L. Pagli
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 67-73

%T Implementing Streams on a Data Flow Computer System With Paged Memory
%A L. J. Caluwaerts
%A J. Debacker
%A J. A. Peperstraete
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 76-83

%T The Piecewise Data Flow Architecture Control Flow and Register Management
%A Joseph E. Requa
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 84-89

%T On the Working Set Concept for Data-Flow Machines
%A Mario Tokoro
%A J. R. Jagannathan
%A Hideki Sunahara
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 90-97

%T A Data Driven System Based on a Microprogrammed Processor Module
%A R. W. Marczynski
%A J. Milewski
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 98-106

%T Architecture of a VLSI Instruction Cache for a RISC
%A David A. Patterson
%A Phil Garrison
%A Mark Hill
%A Dimitris Lioupis
%A Chris Nyberg
%A Tim Sippel
%A Korbin Van Dyke
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 108-116

%T Performance of Shared Cache for Parallel-Pipelined Computer Systems
%A Phil C.C. Yeh
%A Janak H. Patel
%A Edward S. Davidson
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 117-123

%T Using Cache Memory to Reduce Processor-Memory Traffic
%A James R. Goodman
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 124-131

%T A Study of Instruction Cache Organizations and Replacement Policies
%A James E. Smith
%A James R. Goodman
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 132-137

%T Very Long Instruction Word Architectures and the ELI-512
%A Joseph A. Fisher
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 140-150

%T A User-Microprogrammable, Local Host Computer With Low-Level Parallelism
%A Shinji Tomita
%A Kiyoshi Shibayama
%A Toshiaki Kitamura
%A Toshiyuki Nakata
%A Hiroshi Hagiwara
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 151-157

%T Combining Tags With Error Codes
%A Richard H. Gumpertz 
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 160-165

%T Fault Diagnosis of Bit-Slice Processor
%A Young Gil Park
%A Jung Wan Cho
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 166-172

%T Line Digraph Iterations and the (d,k) Problem for Directed Graphs
%A M. A. Fiol
%A I. Alegre
%A J. L.A. Yebra
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 174-177

%T Resource Allocation in Rectangular CC-Banyans
%A Eli Opper
%A Miroslaw Malek
%A G. Jack Lipovski
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 178-184

%T Uniform Theory of the Shuffle-Exchange Type Permutation Networks
%A Frantisek Sovis
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 185-191

%T Analysis of Cray-1S Architecture
%A Vason P. Srini
%A Jorge F. Asenjo
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 194-206

%T Performance Measurements on HEP - A Pipelined MIMD Computer
%A Harry F. Jordan
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 207-212

%T (SM)2: Sparse Matrix Solving Machine
%A Hideharu Amano
%A Takaichi Yoshida
%A Hideo Aiso
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 213-220

%T An Experimental System for Computer Science Instruction
%A R. Kalyana Krishnan
%A A. K. Rajasekar
%A C. S. Moghe
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 222-227

%T Execution Control and Memory Management of a Data Flow Signal Processor
%A Klaus Kronlof 
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 230-235

%T DDDP: A Distributed Data Driven Processor
%A Masasuke Kishi
%A Hiroshi Yasuhara
%A Yasusuke Kawamura
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 236-242

%T A Data Flow Processor Array System: Design and Analysis
%A Naohisa Takahashi
%A Makoto Amamiya
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 243-250

%T A Retrospective on the Dorado, A High-Performance Personal Computer
%A Kenneth A. Pier
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 252-269

%T System/370 Extended Architecture: A Program View of the Channel Subsystem
%A Robert J. Dugan
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 270-276

%T Adaptive Interpretation as a Means of Exploiting Complex Instruction Sets
%A Richard L. Norton
%A Jacob A. Abraham
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 277-282

%T Switching Strategies in a Class of Packet Switching Networks
%A Manoj Kumar
%A Daniel M. Dias
%A J. R. Jump
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 284-300

%T A Comparative Study of Distributed Resource Sharing on Multiprocessors
%A Benjamin W. Wah
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 301-308

%T Concurrent Error Detection in VLSI Interconnection Networks
%A W. Kent Fuchs
%A Jacob A. Abraham
%A Kuang-Hua Huang
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 309-315

%T Hierarchical Function Distribution - A Design Principle for Advanced Multicomputer Architectures
%A W. K. Giloi
%A P. Behr
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 318-325

%T EMMA: An Industrial Experience on Large Multiprocessing Architectures
%A Luigi Stringa
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 326-333

%T A Communication Structure for a Multiprocessor Computer with Distributed Global Memory
%A Lars Philipson
%A Bo Nilsson
%A Bjorn Breidegard
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 334-340

%T ALPHA: A High-Performance LISP Machine Equipped with a New Stack Structure and Garbage Collection System
%A Hiromu Hayashi
%A Akira Hattori
%A Haruo Akimoto
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 342-348

%T A Parallel Execution Model of Logic Programs
%A Shinji Umeyama
%A Koichiro Tamura
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 349-355

%T A System Architecture for the Concurrent Evaluation of Applicative Program Expressions
%A Claudia Schmittgen
%A Werner Kluge
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 356-362

%T A Performance Evaluation of a Lisp-Based Data-Driven Machine (EM-3)
%A Yoshinori Yamaguchi
%A Kenji Toda
%A Toshitsugu Yuba
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 363-369

%T A Pyramidal Approach to Parallel Processing
%A Steven L. Tanimoto
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 372-378

%T The Design of a Parallel Processor for Image Processing On-Board Satellites: An Application Oriented Approach
%A Gerard Gaillat
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 372-386

%T LINKS-1: A Parallel Pipelined Multimicrocomputer System for Image Creation
%A Hitoshi Nishimura
%A Hiroshi Ohno
%A Toru Kawata
%A Isao Shirakawa
%A Koichi Omura
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 387-394

%T LIPP-A SIMD Multiprocessor Architecture for Image Processing
%A T. Ericsson
%A P. E. Danielsson
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 395-400

%T The New Generation of Computer Architecture
%A Philip C. Treleaven
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 402-409

%T Inference Machine: From Sequential to Parallel
%A Shunichi Uchida
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 410-416

%T Overview to the Fifth Generation Computer System Project
%A Tohru Moto-oka
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 417-422

%T A Relational Data Base Machine: First Step to Knowledge Base Machine
%A Kunio Murakami
%A Takeo Kakuta
%A Nobuyoshi Miyazaki
%A Shigeki Shibayama
%A Haruo Yokota
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 423-425

%T A Critique of Multiprocessing von Neumann Style
%A Arvind
%A Robert A. Iannucci
%J Proc. 10th Annual Symposium on Computer Architecture
%D June 1983
%P 426-436