UCSC MASC Group Thermal Work:

In order to ameliorate some of the difficulties associated with the validation of power and thermal models, this work proposes an infrared measurement setup to capture run-time power consumption and thermal characteristics of modern chips. We use infrared cameras with high spatial resolution (30x30um) and high frame rate (125fps) to capture thermal maps. We employ genetic algorithms on the maps to generate a detailed power breakdown (leakage, dynamic, and clock) for each processor floorplan unit. As an example of applicability, we use the obtained measurements to validate CACTI and HotLeakage power models, and propose extensions to existing thermal models to increase accuracy.

UCSC MASC Group Processor Pruning Work:

The proposed methodology attempts to improve efficiency by helping designers eliminate extraneous functionality in existing designs, while ensuring forward progress in program execution. The designer can then systematically ``prune'' the HDL code-base of infrequently used functionality in an effort to reduce power, increase frequency, and reduce area. Forward progress can be ensured using previously proposed techniques. Using this methodology, we exploit increased complexity to expose new avenues for optimization. By applying this technique to an Alpha EV6-like processor, it becomes apparent that significant improvements can be realized. By removing 3% of infrequently used functionality from the optimistic core an increase in frequency of 25% can be realized. Taking into account the replay overhead triggered by the removed functionality, the proposed architecture is still able to achieve a 12% overall speedup.

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